08:00-17:00 WSA

"Architectural Design and System Verification for Wireless SoC – Nice to Have or a Real Necessity?"

Topics and Speakers:

• Best Practices for Adopting Model-Based Design into Wireless SoC Development Flow, C.Warwick, The Mathworks
  
  
• Analog-on-Top Verification of AMS-RF Applications, J. Hartung, Cadence
  
  
• Automated Design Validation Flow for Mixed-Signal SoCs, T. Tarim and O. Eliezer, Texas Instruments
  
  
• Study of Existing Methods for Wireless System Design and Propose a New Method for Top-down and Bottom-up Design in RF, Y. Miyahara, Panasonic R & D Company of America
  
  
• System-Level Verification from RF-Level Design, S.Wedge, Synopsys
  
  
• Architectural Design and System Verification for Wireless SoC, a Must for Multimode Cellular Transceivers, D.Schwarz, Freescale Semiconductor
  
  
• Architectural Design and System Verification for Wireless SoC - Nice to Have or a Real Necessity? M.Barnasconi, NXP Semiconductors
  
  
• A Top Down Design Methodology for Mixed-Signal Integrated Circuits using C++ Behavioral Modeling, M. Perrott, MIT-EECS

Organizers: J. Niehof, NXP Semiconductors; M. Barnasconi, NXP Semiconductors

Sponsor: RFIC

As more and more digital signal processing is included in the RF pipe, not only for modulation and demodulation purposes, but also to facilitate digital calibration, testing and configuration, an overall system-level design approach at architecture level is essential. Furthermore,verification of the complete embedded system solution, including RF and mixed-signal circuitry, is becoming recognized as an essential step in the design release process before committing to tape-out. This workshop brings together representatives from the RF semiconductor and EDA industries to discuss current and future trends in architectural design and system verification that successfully address these challenges.